Semiconductor devices comprising integrated circuits like microchips are of widespread application in electronics such as computer hardware. Miniaturization of the components of the integrated circuits is a critical issue i.e. it is essential to pack the greatest possible amount of components in a microchip. Typical components are transistors, and so-called passive components such as resistors, inductors and capacitors.
A typical conventional structure of semiconductor devices is comprised of a bottom substrate having a top surface and a bottom substrate polarity, a silicon on insulator (SOI) layer portions on a buried oxide (BOX) layer that is deposited on at least a portion of the top surface of the bottom substrate, a top insulating layer over the SOI layer portions, and top metal connecting elements connected to said passive components by conductors extending through via holes. The transistors and passive components are located in the layers deposited over the BOX layer i.e. the SOI and a top silicon dioxide and/or polysilicon layer.
Transistors are an essential part of microchips and it has become possible to reduce the size thereof deeply down to the submicron range. It is however difficult to reduce the size of the passive components to a level being comparable to the size reduction achieved for transistors so that the presence of such passive components limits that layout space available for designing the integrated circuits on the microchips having the above described typical structure.
This conventional structure of microchips thus has the drawback of limiting the possibility of a larger amount integrating components in a semiconductor device of a given size. The disadvantage of this drawback is that it leads to a limit in miniaturization that is conditioned by the sizes and amount of passive components and thereby to relatively large chip sizes when the space needed for the amount of passive components required for an application is larger than the layout space available.
These disadvantages are a boundary to cost efficiency of conventional microchips.